Senior Digital Design Engineer

About the role

Analog Devices is hiring a Senior Digital Design Engineer (P3 level) within its Joint Development Team (JDT), a small, independent, cross-disciplinary group that accelerates the development of components, systems, algorithms and techniques for areas such as advanced medical devices, energy metering, high-speed imaging, security electronics and data converters. The engineer contributes to RTL design, subsystem implementation and mixed-signal integration of digital logic blocks under the mentorship of senior designers, and is expected to develop digital verification skills, possibly switching between design and verification roles depending on project needs.

Key responsibilities

• Write RTL for digital blocks based on specifications.
• Perform lint and CDC analysis and support DFT integration.
• Assist in writing functional testcases and simple UVM components.
• Collaborate with DV engineers on coverage closure and bug resolution.
• Support AMS co-simulation and integration with analog blocks.
• Work with physical design teams on synthesis and timing.
• Develop skills in digital design verification.

Required profile

• BS or MS in ECE, EE, CpE or equivalent.
• 2-5 years of digital design experience, or a strong NCG background.
• Ability to work independently and carry out self-study.
• Strong analytical, problem-solving and communication skills.

Required skills

• Proficiency in SystemVerilog/Verilog; familiarity with UVM preferred.
• Experience with scripting languages such as Python, Perl or TCL.
• A basic understanding of AMS modeling and mixed-signal flows is a plus.

The role involves travel about 10% of the time and is a day shift. Positions requiring access to technical data may require export licensing review.