Design Engineer 3

About the role

Lattice is seeking a Design Engineer 3 to contribute to the development of programmable logic solutions. The role focuses on implementing and verifying RTL designs, targeting Lattice FPGA devices, and supporting IP productization.

Key responsibilities

• Implement and verify RTL designs using standard FPGA synthesis and simulation tools.
• Target designs to Lattice programmable devices using Lattice FPGA software.
• Partner with the IP Productization team to package IP and promote reuse.
• Ensure IP conforms to Lattice IP Quality Management System and IP Factory requirements.
• Produce high‑quality technical documentation for designs.
• Collaborate with Lattice silicon and software development teams to resolve IP/Si/SW issues.
• Package IP using Lattice IP Packaging and Generation tools.
• Provide IP customer support in conjunction with Applications Engineering.
• Report metrics, implement improvement initiatives, and assist in product definition based on customer requirements.
• Develop marketing collateral such as user guides.

Required profile

Required skills

• RTL design
• FPGA synthesis
• FPGA simulation tools
• Lattice FPGA software
• IP packaging
• Technical documentation