Design Engineer III – FPGA/RTL Development

About the role

We are looking for a Design Engineer III to develop and verify RTL designs for Lattice programmable devices. The role involves working closely with IP productization, silicon and software teams to deliver high‑quality IP and support customers worldwide.

Key responsibilities

• Implement and verify RTL designs using standard FPGA synthesis and simulation tools.
• Target designs to Lattice programmable devices with Lattice FPGA software.
• Partner with the IP Productization team to package IP and promote reuse.
• Ensure IP complies with Lattice IP Quality Management System and IP Factory requirements.
• Produce and maintain technical documentation for designs.
• Collaborate with silicon and software development to resolve IP/Si/SW issues.
• Package IP using Lattice IP Packaging and Generation tools.
• Provide IP customer support in conjunction with Applications Engineering.
• Report metrics and drive improvement initiatives.
• Assist in product definition based on customer requirements and develop marketing collateral such as user guides.

Required profile

• Proven background with reference checks and legal right to work in the Philippines.
• Ability to thrive in a fast‑paced, results‑oriented, team‑first environment.

Required skills

• RTL design and verification.
• FPGA synthesis and simulation tools.
• Lattice FPGA software.
• IP packaging and generation tools.
• Understanding of IP quality management processes.
• Collaboration with silicon and software development teams.
• Technical documentation and user guide creation.

What we offer

• Comprehensive compensation and benefits program.
• Opportunities to work on innovative programmable logic solutions.
• Global, collaborative work environment.