Senior Designer, Layout

About the role

Analog Devices is seeking a Senior Designer, Layout to join its Automatic Test Equipment (ATE) Business Unit. You will work on high‑performance semiconductor testing solutions, creating high‑quality, section‑level layouts for complex ICs while collaborating with a global engineering team.

Key responsibilities

• Develop multi‑hierarchical, section‑level IC layouts with a focus on quality and efficiency.
• Collaborate with schematic designers, block layout engineers, and lead layout personnel to meet project milestones.
• Provide technical guidance, allocate tasks, and manage schedules for block layout resources.
• Ensure design integrity, compliance with layout principles, reliability standards, and industry best practices.
• Mentor and train junior engineers and interns, fostering team development.
• Contribute to continuous improvement initiatives and layout process enhancements.

Required profile

• Proven expertise in section‑level (multi‑hierarchical) IC layout design.
• Bachelor’s degree in Electronics or Electrical Engineering.
• At least 5 years of relevant IC layout design experience.
• Strong understanding of semiconductor device physics, cross‑sections, and construction.
• Solid foundation in layout principles, IC reliability, and failure mechanisms.
• Excellent communication, collaboration, and leadership abilities.

Required skills

• Cadence Virtuoso XL
• Calibre verification tools
• IC layout design (section‑level, multi‑hierarchical)
• High‑voltage and high‑speed layout techniques
• Design of switches and multiplexers
• Experience with technology nodes 0.18 µm, 0.35 µm, and 40 nm